1. Field of the Invention
This invention relates generally to semiconductor power structures where the major current flow is perpendicular to the surface of the device. Such devices include vertical MOS power transistors, especially those of the DMOS variety. More particularly, the invention is especially applicable to MOS devices whose body region lies entirely within the drain and whose source region lies entirely within the body region.
2. Description of the Prior Art
MOS structures, whose major current flow was perpendicular to the surface of the structure, have been employed mainly in the fabrication of MOS power transistor devices. Because the relatively lightly doped channel is quite short between the source and the drain region of these MOS power transistor devices, substantial bipolar transistor action can be obtained. That is, minority carriers injected by the relatively heavily doped source region have a very high probability of reaching the reverse biased drain-channel junction. To prevent such undesirable bipolar injection, the source is ordinarily shorted to the body region at a point remote from the desired conducting channel of the device. At high currents, however, such shorting techniques are only partially effective because of the lateral voltage drops which are set up in the body region of the device and which tend to forward bias the source-body region adjacent the conducting channel. MOS power transistors are made to have a relatively high current carrying capability; however, when an attempt is made to turn off the device through an inductive load, the drain-channel voltage may build up very rapidly, thus, causing the device to go into breakdown. As is well known, the collector-emitter breakdown of a bipolar transistor is substantially less than its collector-base breakdown which corresponds to the drain-channel breakdown of a MOS transistor. The greater the current gain of the parasitic bipolar transistor, the greater the diminution in breakdown voltage in the collector-emitter mode. Current gain in a bipolar transistor may be reduced by increasing the doping in its base region; this technique, however, is generally impractical for the parasitic bipolar transistor contained in an MOS transistor because of the constraints on the doping and the length of the MOS channel in order for the desired surface conduction to occur.
In addition to the reduction in breakdown voltage that may occur because of the parasitic bipolar transistor included in an MOS transistor, this breakdown may be so localized that the semiconductor device itself is destroyed. This happens because a bipolar transistor in the collector-emitter breakdown mode supplies its own base current without the necessity for external base connection. Because the bipolar transistor exhibits a negative resistance over one or more portions in its collector-emitter breakdown mode, the current will be locally increased until heating causes destruction of the semiconductor junctions and/or the metallized contacts to the semiconductor device.
In order to achieve high reverse power capability, then the device must either be turned off slowly to limit the build-up of destructive voltage (which of course limits the speed of the device in common applications), or the parasitic bipolar transistor action must be reduced or eliminated in order to obviate the undesirable breakdown modes associated therewith. Known prior art power MOS devices are severely limited by such secondary breakdown modes.